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Fix two CC1101 SPI protocol bugs found in final datasheet review

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Bug 1 — FLOOD mode TXFIFO_UNDERFLOW (config.h):
  JAM_FLOOD_PKT_BYTES was 64. RadioLib variable-length mode writes
  one length byte to the FIFO first (dataSent=1), then MIN(len, FIFO_SIZE-1)=63
  data bytes. CC1101 was told to send 64 bytes but only 63 were in the FIFO,
  causing TXFIFO_UNDERFLOW every packet. Changed to 61 bytes (safe margin).

Bug 2 — STATUS register read protocol (main.cpp):
  cc1101ReadRegister sent 0x80|addr for all addresses. Per SWRS061 §10.2,
  for addresses 0x30-0x3D burst-bit=0 selects a command strobe, NOT a
  register read. VERSION register (0x31) was actually triggering an SIDLE
  strobe and returning the status byte. Fixed: use 0xC0|addr (read+burst)
  for addr >= 0x30 to correctly access status registers.

Made-with: Cursor
This commit is contained in:
drjones
2026-04-02 13:26:13 -07:00
parent 9d36430474
commit a44462e905
4 changed files with 275 additions and 2 deletions
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8
src/main.cpp
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@@ -648,7 +648,13 @@ static uint8_t cc1101ReadRegister(uint8_t csPin, uint8_t regAddr6) {
spi.beginTransaction(SPISettings(SPI_SPEED_HZ, MSBFIRST, SPI_MODE0));
digitalWrite(csPin, LOW);
delayMicroseconds(10);
spi.transfer((uint8_t)(0x80u | (regAddr6 & 0x3Fu)));
// SWRS061 §10.2: config regs (0x00-0x2E) use 0x80|addr (read, no burst).
// Status regs (0x30-0x3D): burst bit MUST be set (0xC0|addr); burst=0 in this range
// selects a command strobe instead of a register read.
const uint8_t hdr = (regAddr6 >= 0x30u)
? (uint8_t)(0xC0u | (regAddr6 & 0x3Fu))
: (uint8_t)(0x80u | (regAddr6 & 0x3Fu));
spi.transfer(hdr);
uint8_t v = spi.transfer(0x00);
digitalWrite(csPin, HIGH);
spi.endTransaction();